Senior Logic Design Engineer, Cache Coherent Interconnects
NVIDIA · US CA Santa Clara · listed 38 days ago
SeniorEngineering (other)
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL…
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